Semiconductor devices are often provided in packages with multiple connected dies, in which circuit elements of the dies are connected in various ways. The semiconductor dies are often designed to be packaged in a particular configuration such that the circuit elements are configured to only support a particular memory density of the package. As newer generations of memory are developed, the memory density in which memory packages are offered changes over time. For example, the memory density for one generation of memory packages may be 8 Gb, and the memory density for a subsequent generation of memory packages may be 16 Gb. Semiconductor manufacturers supplying the memory dies to be implemented on both the older and newer packages have traditionally designed a first memory die configured to support the first memory density (e.g., 8 Gb) and a second memory die to support the second memory density (e.g., 16 Gb). One drawback of this approach is that semiconductor manufacturers endure significant costs from the design, production, marketing, and shipment of two separate memory dies throughout the transition period from one generation to another.